Flash memory is a non-volatile computer storage technology that can be electrically erased and reprogrammed. It is primarily used in memory cards, USB flash drives, and solid-state drives for general storage and transfer of data between computers and other digital products. It is a specific type of EEPROM (electrically-erasable programmable read-only memory) that is erased and programmed in large blocks. Because erase cycles are slow, the large block sizes used in flash memory erasing give it a significant speed advantage over old-style EEPROM when writing large amounts of data.
Since flash memory is non-volatile, no power is needed to maintain the information stored in the chip. In addition, flash memory offers fast read access times (although not as fast as volatile DRAM memory used for main memory in PCs) and better kinetic shock resistance than hard disks. Another feature of flash memory is that when packaged in a “memory card,” it is extremely durable, being able to withstand intense pressure, extremes of temperature, and even immersion in water.
Flash memory costs far less than byte-programmable EEPROM and therefore has become the dominant technology wherever a significant amount of non-volatile, solid state storage is needed. Example applications include PDAs (personal digital assistants), laptop computers, digital audio players, digital cameras and mobile phones. It has also gained popularity in console video game hardware, where it is often used instead of EEPROMs or battery-powered static RAM (SRAM) for game save data.
Flash memory stores information in an array of memory cells made from floating-gate transistors. In traditional single-level cell (SLC) devices, each cell stores only one bit of information. Some newer flash memory, known as multi-level cell (MLC) devices, can store more than one bit per cell by choosing between multiple levels of electrical charge to apply to the floating gates of its cells.
Each flash memory cell resembles a standard MOSFET, except the transistor has two gates instead of one. On top is the control gate (CG), as in other MOS transistors, but below this there is a floating gate (FG) insulated all around by an oxide layer. The FG is interposed between the CG and the MOSFET channel. Because the FG is electrically isolated by its insulating layer, any electrons placed on it are trapped there and, under normal conditions, will not discharge for many years. When the FG holds a charge, it screens (partially cancels) the electric field from the CG, which modifies the threshold voltage (VT) of the cell. During read-out, a voltage intermediate between the possible threshold voltages is applied to the CG, and the MOSFET channel will become conducting or remain insulating, depending on the VT of the cell, which is in turn controlled by charge on the FG. The current flow through the MOSFET channel is sensed and forms a binary code, reproducing the stored data. In a multi-level cell device, which stores more than one bit per cell, the amount of current flow is sensed (rather than simply its presence or absence), in order to determine more precisely the level of charge on the FG.
For high reliability or harsh environment applications, such as automotive uses, current flash micro controller quality and reliability requirements result in relatively large flash test times necessitating higher parallelism in test and low cost per second test platforms as well as efficient use of probe insertions to avoid unnecessary contact with device bond pads. Flash access is limited by device architecture which presents potential gaps where equal access and comparison cannot be made to all portions of the memory. This is due to memory mapping portions of flash to different busses and clock domains to decrease the total address space which must be reserved for Flash.